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MEMSnet Home: MEMS-Talk: Cu Plating Vias
Cu Plating Vias
2006-06-07
Isibhakhomen Umolu Abhulimen
2006-06-07
Rybnicek, Kimon
Cu Plating Vias
Rybnicek, Kimon
2006-06-07
Isi,

Are you depositing Cu using PECVD or PVD. If you are using PVD, is it in
a sputter tool? I ask because I haven't heard of PECVD Cu. If you are
using PVD (physical vapor deposition), you may need thicknesses in
excess of 1um on the top surface of the wafer to get an electrically
continuous film at the bottom of the vias.

-Kimon

-----Original Message-----
From: [email protected]
[mailto:[email protected]] On Behalf Of Isibhakhomen Umolu
Abhulimen
Sent: Wednesday, June 07, 2006 11:46 AM
To: General MEMS discussion
Subject: [mems-talk] Cu Plating Vias

Dear All,

I fabricated vias with tapered sidewalls (85- 87 degrees), 20 um in
diameter and a depth of 140 um. I am having problem Cu plating these
vias because I have no conformal Cu seed layer at the bottom and
sidewalls of the vias. The Cu seed layer is deposited using PECVD at a
pressure of 5mTorr. Has anyone seen this problem and how did you solve
it?
reply
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