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MEMSnet Home: MEMS-Talk: Thick SiO2 etch
Thick SiO2 etch
2007-04-19
Xiaoguang "Leo" Liu
2007-04-20
Shao Guocheng
2007-04-20
VS Bhat
2007-04-20
P.E.M. Kuijpers
2007-04-20
Roger Brennan
2007-04-20
Joe Lonjin
Thick SiO2 etch
P.E.M. Kuijpers
2007-04-20
Dear Xiaoguang "Leo" Liu,

A solution can be to use also a  structured Cr mask below you resist
before etching the SiO2 layer.
We found that this gives better resulst than only a resist mask.

Regards,
Peter Kuijpers
MiPlaza
DTS/TFF
Phone.:  (+31 40 27) 98904 (mobex)
mobile:(+31) 06-12507027
fax.:     [+31 40 27) 44769
mailto:p.e.m.kuijpers@philips.com


"Xiaoguang \"Leo\" Liu" 

Subject [mems-talk] Thick SiO2 etch Classification

Dear all

For one of my projects, I need to pattern thick thermal oxide of
1.5um. I used 49%HF:DI = 1:6 as the etchant and 20um AZ9260 as a mask
(the reason of using this thick resist is that I need to do a through
wafer Deep RIE after patterning the SiO2).

The etching of the oxide takes more than half an hour in the etchant.
My problem is that the photoresist can not stand the HF solution and
start to peel off (especially the smaller features) after about 20min.
HF also attacks the photoresist reducing the overall thickness of the
photoresist, which can impact my later DRIE process.

Could anybody illuminate me with a better method to etch the oxide
layer without destroying the photoresist?
reply
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