A MEMS Clearinghouse® and information portal
for the MEMS and Nanotechnology community
RegisterSign-In
MEMSnet Home About Us What is MEMS? Beginner's Guide Discussion Groups Advertise Here
News
MEMSnet Home: MEMS-Talk: Etch Question
Etch Question
2008-09-19
Shaikh, Fayaz A
2008-09-22
汪飞
Etch Question
Shaikh, Fayaz A
2008-09-19
Hi,

I have a Al-1mic (M2), SiO2 - 2mic (D1), and Al-1mic (M2) stack on a silicon
wafer. I have to etch a 100 mic x 200 mic slot through wafer. We have ICP, RIE,
AOE tools in our lab for oxide, si, metal etch. I can not use metal mask. I
tried using a thick resist of up to 10mic and etched through the stack and I am
seeing  micro masking. I am not sure through if this micro masking will be a
problem if I continue to silicon etch! But are there any suggestion where I can
avoid the micro-masking? Most likely it is being introduced during oxide etch
which is penetrating O2 or Fl into M2 layer.

Please let me know if you guys have any suggestions. Email to me at
fayazs@gatech.edu

Fayaz
reply
Events
Glossary
Materials
Links
MEMS-talk
Terms of Use | Contact Us | Search
MEMS Exchange
MEMS Industry Group
Coventor
Harrick Plasma
Tanner EDA
MEMStaff Inc.
Mentor Graphics Corporation
University Wafer
Tanner EDA by Mentor Graphics