Hi Nicolas,

   I think you may reduce pinholes by using an adhesion promoter, A-174 .  Also,
if you are using type C parylene you should consider changing to type N which is
known for lower pinhole counts.

Good luck,
   Michael

>>> Nicolas Vergauwe  9/16/2009 12:16 PM >>>
Hi guys,

I'm working on systems where I use parylene as a dielectric. The parylene
thickness I used was 800 nm. Although the CVD process of parylene is known as
pinhole-free, I see frequently some pinholes in my dielectric layer (which is
not the same as breakthrough because most other places are ok). Therefore I
thought of depositing two parylene layers of 800 nm, where between the two
depositions I clean with piranha (3:1) to remove possible dust or contaminants.
But still the problem of pinholes persists.

Can you give me any comments or suggestions how to solve this nasty problem?
Could it be that something goes wrong during the etching of the parylene (to
free the contact pads so I can test my device)?

Thanks,
Nicolas