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Message-ID: <35E56AE9.3F96E3D7@email.uc.edu>
Date: Thu, 27 Aug 1998 10:19:21 -0400
From: Alexander Hoelke 
Organization: Universtity of Cincinnati
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To: Dirk Zielke , mems-cc@ISI.EDU
Subject: Re: (Fwd) FW: deep vertical KOH etching
References: <199808262332.QAA27574@darkstar.isi.edu>
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> >  I have worked the acceleration sensor.
> >  My questions are
> >  1. the method of vertical KOH etching on (110) Si wafer.
> >  2. the etching rate of vertical KOH etching on (110) Si wafer.
> >  I wish your advices and informations.
> >  Thank you so much for reading my mail.
> >  e-mail address; mhnam@palgong.kyungpook.ac.kr
>
> Hi,
> The vertical trenches are only produced  on two direction. These are
> 35.26° and 144.73 degree, if the flat is in 110-direction. The etch
> rates of the 111-planes are nearby zero, if you hit exactly the
> directions (mask misalignment). Furthermore is the design of such
> structures more complicate compared with 100-silicon, because of the
> non existing 8-times symmetry of 110-silicon.
> Dirk Zielke

Also, there is no standard for flats on (110) wafers. My understanding is,
if the flat is along a <110> direction, and there is only one on a (110)
wafer,  and if you align a pattern parallel to that, you get a shallow
v-groove, consisting of two {111} planes. The vertically intersecting (111)
planes you are looking for are then at 54.74 and 125.26 off that flat.

The case Mr. Zielke is describing is that the flat is along a <100>
direction, I believe. There is, again, also only one <100> direction lying
in a (110) surface, and the <110> direction I was referring to first is
perpendicular to that. We used to have wafers like that  a long time ago,
mask design is complicated.

Another thing makes alignment difficult: Front- and backside are unique. If
you want to use both directions that produce vertical channels, you have to
make sure which side of the wafer you are. The corresponding patterns that
you need for either side are the mirror images of each other.

We now use (110) wafers with two flats. These are the dirctions of the
vertically intersecting {111} planes. These directions are of type <112>,
and I have not found that mentioned anywhere in the literature (except in a
paper I am trying to publish for some time now). Anyway, that makes mask
design much simpler, especially if you are only interested in exposing
vertical {111} planes in one direction, such as in the case of etching
narrow channels. Then, it also doesn't matter which side of the wafer you
use. If it does, you can tell relatively easily.

Virginia Semiconductor is our wafer supplier.

Good luck