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MEMSnet Home: MEMS-Talk: RIE Etching SiO2/Si
RIE Etching SiO2/Si
2011-06-06
Judith Linacero Blanco
2011-06-06
Khaled Mohamed Ramadan
2011-06-07
Glenn Silveira
2011-06-06
Andrew Sarangan
2011-06-06
Gary Hillman
2011-06-09
Judith Linacero Blanco
2011-06-09
Judith Linacero Blanco
2011-06-09
Robert Ditizio
2011-06-07
antwi nimo
2011-06-07
SALVADOR_ALCANTARA_INIESTA
RIE Etching SiO2/Si
Judith Linacero Blanco
2011-06-09
 Hi Andrew,

I try to etch 300nm in Si. With the process that I explain you, I etched
180nm in silicon, and now I'm trying to change the parameters.
I use 25sccm HBr, 30mt and 150W with short and repetitive processes.

I use samples with thermal SiO2 than we buy in a Siltronix Company, but now
we have a new evaporator (thermal, e-beam and sputtering) and I would like
to evaporate our samples, but I don´t know if I can use all kind of process,
Could you recommend me something? Does the RIE etching change?

Thanks a lot

 *JUDITH NOEMÍ LINACERO BLANCO*
*Plataforma de Nanotecnologia*
Parc Científic de Barcelona
c/ Baldiri Reixac 10-12
08028 Barcelona, Spain
*Tel.*        +34 934037138
*Fax.*       +34 934037109
[email protected]
http://www.pcb.ub.es/plataforma/nanotecnologia

El 06/06/2011 16:42, Andrew Sarangan escribió:

SiO2 should make a good etch mask for Si. How deep does the Si have to
be etched? Also depends on the type of SiO2 - thermal, CVD etc..
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