> Dear colleagues:
>
> I would like to get suggestions on fabrication processes.  I am designing a
> process for fabricating a device containing three levels of etched features
> on a silicon wafer.  The features include basins of about 10 micron deep,

                                            Is the basin big enough to
satify the planarization requirements? I think 10um is not very deep
if your basin area is big enough.

> trenches of about 50 micron wide and 50 micron deep, and narrow >
through-holes (etched all-the-way through the silicon wafers of 300 to
450 > micron thick).  I am considering the use of Si(110) substrates
and KOH wet > etching for achieving the arrow through-holes.  It seems
that I have to go > through at least three etching steps in order to
achieve three levels of > depth.  My difficulty is at the photoresist
coating between the steps.  Any > one of my device features would
cause sufficient corrugations on the > substrate surface and make
uniform photoresist coating impossible.  I would

You can etch through-hole from back side to avoid the corrugations and
make the process possible.  It's my advice and I hope it would be
hopeful for you.

> like to hear any suggestions on the overall process design, suitable etching
> processes (wet or dry), and any tricks and/or materials that may make the
> fabrication easier.
>
> Thank you very much.
>
>
>
> Xiaochuan Zhou, Ph.D.
> Xeotron Corporation
> E-mail [email protected]
>
>


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