Dear Randall Cha,

we are using the AuSn bumping process since morethan ten years (see E.
Zakel et al.: Gold-Tin Bumps for TAB Inner Lead Bonding with Reduced
Bonding Pressure. Soldering & Surface Mount Technology No. 12 (October
1992)). AuSn bumping and assembly processes have been demonstrated
successfully in microwave and optoelectronics applications. We are open
for co-operations and we transfer the bumping and assembly process to
any company which is interested in that technology. If you are
interested, please contact me.

Best regards,

Hermann Oppermann

--
Dr. Hermann Oppermann
Fraunhofer IZM
Gustav-Meyer-Allee 25
D-13355 Berlin, Germany
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phone: +49-30-46403-163, -160
Fax:   +49-30-46403-161
email: [email protected]
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Dept. Chip Interconnection Technologies
Group Optoelectronics, HF and Sensor Integration
http://www.izm.fhg.de/
http://www.izm.fhg.de/avt/index.htm
http://www.izm.fhg.de/avt/opperm.htm
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[email protected] wrote:

>Dear MEMS colleagues,
>
>I will like to ask for help on 80-20 Au/Sn plating. I am
>currently setting up a small plating bench @ school to
>conduct selective plating of aforesaid eutectic bumps.
>
>Please advise on any techniques, electrolytes (1-pot or 2-
>pots), plated heights of each respective metal (for 2-
>pots), or other feasible methods which I can perform in
>lab, if possible.
>
>If possible, I hope to have the ramp-up profiles for the
>plated bumps as well.
>
>Many thanks in advance.
>
>Best,
>RC, Singapore
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