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MEMSnet Home: MEMS-Talk: RE: DRIEetch of highly doped silicon wafers
RE: DRIEetch of highly doped silicon wafers
2002-11-13
[email protected]
RE: DRIEetch of highly doped silicon wafers
[email protected]
2002-11-13
Hi everyone

Highly doped silicon is used as an etch stop for KOH etching, but you should
not see the same effect with dry etching, as this relies on a different
chemical reaction.
There is likely to be no problem with highly doped silicon etching using the
Bosch process.  The rate may vary a bit from undoped silicon, and you may
need to adjust the ratio of etch to dep step times to compensate.  The
anti-notch features are only necessary if you are going down to a buried
oxide (you do not say if this is the case).  The Plasmatherm and our systems
show very similar process sensitivities, according to papers from the
University of Twente (search for 'de Boer' in the Authors).

Martin Walker B.Sc.(Tech.) M.Sc.
Tactical Marketing Engineer
Oxford Instruments Plasma Technology
North End, Yatton, Bristol, BS49 4AP UK
T.+44 (0)1934 837031  F.+44 (0)1934 837001
E. 
W. 

Serdar sezen wrote on Mon, 11 Nov 2002 14:18:05 -0800 (PST)
Hi,
We are currently working on a device that will be bulk micromachined in DRIE
using low resistivity Silicon wafers. I was wondering if anybody had any
experiences on the performance of the DRIE systems on highly p-Boron doped
(around 10^19 cm^-3) low resistivity (around 0.01 ohm.cm.) wafers. I am
especially concerned with the directionality of the etch in a typical DRIE
(plasmatherm) system which does not have the anti-notching hardware add-on
and uses BOSCH process parameters (though I can play with the passivation
and etching cycle durations). Any kind of feedback would be greatly
appreciated,
Thanks,
Serdar Sezen
Advanced Microsystems Lab University of Minnesota



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